Reversible logic is an emerging area of research, having applications in nanotechnology, low power CMOS design, quantum computing and DNA computing. In this paper two different parity preserving reversible error coding and detection circuits are studied. First we propose two new reversible Hamming code generator circuits. One of them is parity preserve. We also propose a new parity preserving reversible Hamming code error detector circuit. The proposed parity preserving reversible Hamming code generator and error detector circuits provide single error correction-double error detection (SEC-DED). The designs are better than the existing counterparts in term of quantum cost, number of constant inputs and number of garbage outputs. Then we propose parity preserving reversible cyclic code encoder/decoder circuits for the first time. A parity preserving reversible D flipflop is also proposed. Equivalent quantum representation of two parity preserving 4*4 reversible gates, IG and PPHCG, are also proposed. We show for the first time that IG has a quantum cost of only 7 and PPHCG has a quantum cost of only 6.